Semiconductor Devices and Logic Gates
At absolute zero temperature, an intrinsic semiconductor behaves as
conductor
superconductor
insulator
intrinsic semiconductor
The logic gate equivalent to the combination of logic gates shown in the figure is
AND
NOR
$O R$
NAND
In a transistor, if the collector current is $98 \%$ of emitter current, then the ratio of the base and collector currents is
$1: 98$
$1: 1$
$1: 49$
$1: 99$
In the given circuit, if $A=0, B=1$ and $C=1$ are inputs, then the values of $y_1$ and $y_2$ are respectively
1.1
0.1
0.0
1.0
$ \text { In the given options, the diode that is forward biased is } $




In a common emitter transistor amplifier the resistance of collector is $3 \mathrm{k} \Omega$. If the current amplification factor is 100 and the base resistance is $2 \mathrm{k} \Omega$, then the power gain of the transistor is
150
10000
1500
15000
If $X, Y$ and $Z$ are the sizes of the emitter, base and collector of a transistor respectively, then
$X>Z>Y$
$X>Y>Z$
$Z>X>Y$
$Z>Y>X$
The logic gate equivalent to the circuit given in the figure is
NAND
$O R$
AND
NOR
In common emitter amplifier of a transistor, if the ratio of the voltage gain and current amplification factor is 4 , then the ratio of the collector and base resistances is
$16: 1$
$1: 16$
$1: 4$
$4: 1$
If three logic gates are connected as shown in the figure, then the correct truth table of the circuit is
$ \begin{array}{|c|c|c|} \hline A & B & y \\ \hline 0 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 0 & 0 \\ 1 & 1 & 1 \\ \hline \end{array} $
$ \begin{array}{|c|c|c|} \hline A & B & y \\ \hline 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 0 \\ \hline \end{array} $
$ \begin{array}{|c|c|c|} \hline A & B & y \\ \hline 0 & 0 & 0 \\ 0 & 1 & 0 \\ 1 & 0 & 0 \\ 1 & 1 & 1 \\ \hline \end{array} $
$ \begin{array}{|c|c|c|} \hline A & B & y \\ \hline 0 & 0 & 0 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 0 \\ \hline \end{array} $
The voltage gain and the current amplification factor of a transistor in common emitter configuration are 300 and 60 respectively. If the collector resistance is $5 \mathrm{k} \Omega$, then the base resistance is
$5 \mathrm{k} \Omega$
$25 \mathrm{k} \Omega$
$2 \mathrm{k} \Omega$
$1 \mathrm{k} \Omega$
The logic gate equivalent to the circuit shown in the figure is
AND
NAND
NOR
$O R$
When three NAND logic gates are connected as shown in the figure, then the logic gate equivalent to the circuit is
NOT
AND
$O R$
NOR
The device used for voltage regulation is
Zener diode
photo diode
light emitting diode
solar cell
emitter, base, collector
collector, base, emitter
base, emitter, collector
base, collector, emitter
A transistor works as an amplifier when
emitter-base junction is forward biased and base-collector junction is reverse biased.
both emitter-base and base-collector junctions are forward biased.
both emitter-base and base-collector junctions are reverse biased.
emitter-base junction is reverse biased and base-collector junction is forward biased.
If five logic gates are connected as shown in the figure, then the values of $y_1, y_2$ and $y_3$, are respectively
1, 1, 1
$0,0,1$
$1,1,0$
$1,0,1$
A Zener diode of breakdown voltage 20 V is connected as shown in the given circuit. The current through Zener diode is
10 mA
4 mA
6 mA
8 mA
The voltage gains of two amplifiers connected in series are 8 and 12.5 . If the voltage of the input signal is $200 \mu \mathrm{~V}$, then the voltage of the output signal is
$50 \mu \mathrm{~V}$
$20 \mu \mathrm{~V}$
20 mV
50 mV
$ \text { The following configuration of gates is equivalent to } $
$ \text { Truth table for the given circuit is } $
$ \begin{array}{lll} \hline A & B & Y \\ \hline 0 & 0 & 1 \\ \hline 0 & 1 & 0 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $
$ \begin{array}{lll} \hline A & B & Y \\ \hline 0 & 0 & 1 \\ \hline 0 & 1 & 1 \\ \hline 1 & 0 & 0 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $
$ \begin{array}{lll} \hline A & B & Y \\ \hline 0 & 0 & 1 \\ \hline 0 & 1 & 1 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $
$ \begin{array}{lll} \hline A & B & Y \\ \hline 0 & 0 & 0 \\ \hline 0 & 1 & 1 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $
If $R_C$ and $R_B$ are respectively the resistances of in collector and base sides of the circuit and $\beta$ is the current amplification factor, then the voltage gain of a transistor amplifier in common emitter configuration is
The current gain of a transistor in common emitter configuration is 80 . The resistances in collector andbase sides of the circuit are $5 \mathrm{k} \Omega$ and $1 \mathrm{k} \Omega$ respectively. If the input voltage is 2 mV , the output voltage is
4 V
0.4 V
0.8 V
8 V
Four logic gates are connected as shown in the figure. If the inputs are $A=0, B=1$ and $C=1$, then the values of $Y_1$ and $Y_2$ respectively, are

Consider the statements In a semiconductor
(A) There are no free electrons at 0 K.
(B) There are no free electrons at any temperature.
(C) The number of free electrons increases with temperature.
(D) The number of free electrons is less than that in a conductor.
Output of following logic circuit is

The output current versus time curve of a rectifier is shown in the figure. The average value of output current in this case is ........... .

A change of $0.04 \mathrm{~V}$ takes place between the base and the emitter when an input signal is connected to the common emitter transistor amplifier. As a result, $20 ~\mu \mathrm{A}$ change takes place in the base current and a change of $2 \mathrm{~mA}$ takes place in the collector current. The input resistance and AC current gain are
The truth table given below corresponds to logic gate.

A transistor is connected in common emitter configuration. The collector supply is $8 \mathrm{~V}$ and the voltage drop across a resistor of $800 \Omega$ in the collector circuit is $0.5 \mathrm{~V}$. If the current gain factor $\alpha$ is 0.96, then the base current is
$ \begin{aligned} y & =\overline{\bar{A}+\bar{B}}=\overline{\bar{A}} \cdot \overline{\bar{B}}=A B \\ & =\text { Output of AND gate } \end{aligned} $









